1. Field of the Invention
The present invention generally relates to Power over Ethernet (PoE) devices, and more specifically to a virtual interface to the PoE device through other networking elements such as a physical layer device (PHY) or a switch.
2. Related Art
Ethernet communications provide high speed data communications over a communications link between two communications nodes that operates according the IEEE 802 Ethernet Standard. The communications medium between the two nodes can be twisted pair wires for Ethernet, or other types communications medium that are appropriate. PoE communication systems provide power and data communications over a common communications link. More specifically, a power source device (PSE) connected to the physical layer of the first node of the communications link provides direct current (DC) power (for example, 48 volts DC) to a powered device (PD) at the second node of the communications link. The DC power is transmitted simultaneously over the same communications medium with the high speed data from one node to the other node.
Example PD devices that utilize PoE include Internet Protocol (IP) phones, wireless access points, etc. The PSE device is often a data switch having at least two rows of data ports, where a data port in the input row of data ports can be switched to any one of the data ports in the output row of data ports. Each data port typically includes a serial-to-parallel (i.e. SERDES) transceiver, and/or a PHY device, to support high speed serial data transport. Herein, data ports and their corresponding links can be interchangeably referred to as data channels, communication links, data links, etc, for ease of discussion.
On the PSE chip portion of the PoE device, the DC voltage supply circuit provides a voltage, e.g., 48 volts, to power the PD. The DC voltage supply and its corresponding output voltage, are controlled by the PSE controller. For example, the PSE controller includes a switch connected across output terminals of the DC voltage supply circuit for determining when its output voltage is switched on or off. The PSE chip also performs functions such as discovering a presence of PD devices by checking for characteristic resistances, managing/integrating power, and monitoring current draw.
An important aspect of the PoE device is its management system which has to interface with all the subsystems in the device including the PSE subsystem that includes the PSE controller chip as well as the data subsystem that may include but is not limited to a PHY chip, Switch chip or both. The management system is often referred to as the system host. Often this host is a local central processor unit (CPU) or simple microcontroller that may run some sort of firmware or software. In some cases, the CPU, PHY and switch may be embedded in one chip while in other larger systems that may be physically located on separate printed circuit boards (PCBs).
In the past, significant resources have been directed to the interface between the system host and the PHY chip and/or the switch chip. Also, significant resources may be required to add a PSE sub-system to a data only design to enable the host to communicate with the PSE controller. This is a cumbersome process. The invention here allows for minimal resources and effort to be applied as the interface to the host for the PSE subsystem can be presented as an extension of the switch or PHY subsystem through virtual registers that reflect those present in the PSE chip but abstract the host from their physical location.
A part of the interface between the PHY and the PoE chip is an isolation boundary. A DC isolation boundary is typically formed between the PHY and the PSE controller to limit any effects of DC feedback associated with the DC voltage supply circuit. One of the most common ways of transferring signals across the isolation boundary is to use opto-isolators or opto-coupling devices. Opto-isolators, for example, can be placed along the feedback path between the PSE controller and the PHY. As understood by those of skill in the art, opto-isolators are made up of a light emitting device, and a light sensitive device, wrapped in a single package, but having no electrical connection between the two. A beam of light facilitates transmission of the signals across the isolation boundary. The light emitter is nearly always an LED.
Implementing virtual registers/interface in the PHY or Switch does not eliminate the need to cross the isolation boundary. However, this implementation abstracts the system host from the physicality of this boundary.
What is also needed is a technique to more efficiently program registers within the PHY and the PSE controller. More specifically, what is needed is a method or system that will eliminate the need to separately maintain register sets within the PHY and within the PSE controller.